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hcpl-2400 functional diagram 7 1 2 3 4 5 6 8 anode 1 cathode 1 cathode 2 anode 2 gnd v cc v o1 v o2 hcpl-2430 truth table (positive logic) led on off v cc gnd nc 7 1 2 3 4 5 6 8 hcpl-2400/11 nc led on off on off enable l l h h output l h z z truth table (positive logic) output l h features ? high speed: 40 mbd typical data rate ? high common mode rejection: hcpl-2400: 10 kv/s at v cm = 300 v (typical) ? ac performance guara n teed over temperature ? high speed algaas emitter ? compatible with ttl, sttl, lsttl, and hcmos logic families ? totem pole and tri state output (no pull up resistor required) ? safety approval C ul recognized C 3750 v rms for 1 minute per ul1577 C iec/en/din en 60747-5-2 approved with v iorm = 630 v peak (option 060) for hcpl-2400 C csa approved ? high power supply noise immunity ? mil-prf-38534 hermetic version available (hcpl-5400/1 and hcpl-5430/1) applications ? isolation of high speed logic systems ? computer-peripheral interfaces ? switching power supplies ? isolated bus driver (networking applications) ? ground loop elimination ? high speed disk drive i/o ? digital isolation for a/d, d/a conversion ? pulse transformer replacement a 0.1 f bypass capacitor must be connected between pins 5 and 8. hcpl-2400, hcpl-2430 20 mbd high cmr logic gate optocouplers data sheet description the hcpl-2400 and hcpl-2430 high speed opto-cou - plers combine an 820 nm algaas light emitting diode with a high speed photodetector. this combina-tion re - sults in very high data rate capability and low input cur - rent. the totem pole output (hcpl-2430) or three state output (hcpl-2400) eliminates the need for a pull up re - sistor and allows for direct drive of data buses. the detector has optical receiver input stage with built- in schmitt trigger to provide logic compatible wave- forms, eliminating the need for additional waveshaping. the hysteresis provides diferential mode noise immuni - ty and min i mizes the potential for output signal chatter. the electrical and switching characteristics of the hcpl- 2400 and hcpl-2430 are guaranteed over the tempera - ture range of 0c to 70c. functional diagram caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product
2 these optocouplers are compatible with ttl, sttl, lsttl, and hcmos logic families. when schottky type ttl devices (sttl) are used, a data rate performance of 20 mbd over temperature is guaranteed when using the application cir - cuit of figure 13. typical data rates are 40 mbd. selection guide 8-pin dip (300 mil) minimum cmr single dual minimum input maximum channel channel dv/dt v cm on current propagation delay hermetic package package (v/s) (v) (ma) (ns) package hcpl-2400 1000 300 4 60 hcpl-2430 1000 50 4 60 500 50 6 60 hcpl-540x* 500 50 6 60 hcpl-543x* 500 50 6 60 hcpl-643x* *technical data for the hermetic hcpl-5400/01, hcpl-5430/31, and hcpl-6430/31 are on separate avago publications. ordering information hcpl-2400 and hcpl-2430 are ul recognized with 3750 vrms for 1 minute per ul1577. part number option package surface mount gull wing tape & reel ul 5000 vrms/1 minute rating iec/en/din en 60747-5-2 quantity rohs compliant non rohs compliant hcpl-2400 -000e no option 300mil dip-8 50 per tube -300e #300 x x 50 per tube -500e #500 x x x 1000 per reel -060e #060 x 50 per tube -360e -360 x x x 50 per reel hcpl-2430 -000e no option 300mil dip-8 50 per tube -300e #300 x x 50 per tube -500e #500 x x x 1000 per reel -020e - x 50 per tube -060e - x 50 per tube to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: hcpl-2430-500e to order product of gull wing surface mount package in tape in rohs compliant. example 2: hcpl-2400 to order product of 8-pin dip package in tube packaging and non rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information. remarks: the notation #xxx is used for existing products, while (new) products launched since 15th july 2001 and rohs compliant option will use -xxxe.
3 schematic hcpl-2400 schematic i f v f v cc v o gnd i cc i o + ? 2 3 8 5 i f1 v f1 v cc v o1 i cc i o + ? 1 2 8 6 shield v f2 v o2 gnd i o ? + 3 4 5 i f2 7 anode cathode i e v e 7 6 truth table (positive logic) led on off led on off on off enable l l h h output l h z z truth table (positive logic) output l h
4 package outline drawings 8-pin dip package (hcpl-2400, hcpl-2430) 8-pin dip package with gull wing surface mount option 300 (hcpl-2400, hcpl-2430) 1.080 0.320 (0.043 0.013) 2.54 0.25 (0.100 0.010) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. dimensions in millimeters and (inches). *marking code letter for option numbers. "v" = option 060 option numbers 300 and 500 not marked. note: floating lead protrusion is 0.25 mm (10 mils) max. 5 typ. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010) 9.65 0.25 (0.380 0.010) 1.78 (0.070) max. 1.19 (0.047) max. a xxxxz yyw w date code 5 6 7 8 4 3 2 1 option code* ul recognition ur type number 3.56 0.13 (0.140 0.005) 0.635 0.25 (0.025 0.010) 12 nom. 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.65 0.25 (0.380 0.010) 6.350 0.25 (0.250 0.010) 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) land pattern recommendation 1.080 0.320 (0.043 0.013) 3.56 0.13 (0.140 0.005) 1.780 (0.070) max. 1.19 (0.047) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002)
5 regulatory information the hcpl-24xx has been approved by the following organizations: solder refow thermal profle 0 time (seconds) temperature (c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160c 140c 150c peak temp . 245c peak temp . 240c peak temp. 230c soldering tim e 200c preheating tim e 150c, 90 + 30 sec. 2.5c 0.5c/sec. 3c + 1c/?0.5c tight typical loos e room temperature preheating rate 3c + 1c/?0.5c/sec. reflow heating rate 2.5c 0.5c/sec. recommended pb-free ir profle 217 c ramp-d ow n 6 c/sec. max. ramp-u p 3 c/sec . max . 150 - 200 c 260 +0/-5 c t 25 c to pea k 60 to 150 sec. 20-40 sec. time w ithin 5 c of ac tu al peak tempera t ure t p t s prehea t 60 to 180 sec. t l t l t smax t smin 25 t p tim e tempera ture no tes: the time fr om 25 c to peak tempera ture = 8 minutes max. t smax = 200 c, t smin = 150 c note: non-halide fux should be used. note: non-halide fux should be used. vde approved according to vde 0884/06.92 (option 060 only). ul recognized under ul 1577, component recognition program, file e55361. iec/en/din en 60747-5-2 approved under: iec 60747-5-2:1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01. (option 060 only)
6 iec/en/din en 60747-5-2 insulation related characteristics (hcpl-2400 o ption 060 only) description symbol characteristic units installation classifcation per din vde 0110/1.89, table 1 for rated mains voltage 300 v rms i-iv for rated mains voltage 450 v rms i-iii climatic classifcation 55/85/21 pollution degree (din vde 0110/1.89) 2 maximum working insulation voltage v iorm 630 v peak input to output test voltage, method b* v iorm x 1.875 = v pr , 100% production test with t m = 1 sec, v pr 1181 v peak partial discharge < 5 pc input to output test voltage, method a* v iorm x 1.5 = v pr , type and sample test, v pr 945 v peak t m = 60 sec, partial discharge < 5 pc highest allowable overvoltage* (transient overvoltage, t ini = 10 sec) v iotm 6000 v peak safety limiting values (maximum values allowed in the event of a failure, also see figure 12, thermal derating curve.) case temperature t s 175 c input current i s,input 230 ma output power p s,output 600 mw insulation resistance at t s , v io = 500 v r s 10 9 *refer to the front of the optocoupler section of the current catalog, under product safety regulations section iec/en/din en 60747-5-2 for a detailed description. note: isolation characteristics are guaranteed only within the safety maximum ratings which must ben ensured by protective circuits in applica - tion. insulation and safety related specifcations parameter symbol value units conditions minimum external l(101) 7.1 mm measured from input terminals to output air gap (external terminals, shortest distance through air. clearance) minimum external l(102) 7.4 mm measured from input terminals to output tracking (external terminals, shortest distance path along body. creepage) minimum internal 0.08 mm through insulation distance, conductor to plastic gap conductor, usually the direct distance between the (internal clearance) photoemitter and photodetector inside the optocoupler cavity. tracking resistance cti 200 volts din iec 112/vde 0303 part 1 (comparative tracking index) isolation group iiia material group (din vde 0110, 1/89, table 1) option 300 - surface mount classifcation is class a in accordance with cecc 00802.
7 absolute maximum ratings (no derating required up to 70c) parameter symbol minimum maximum units note storage temperature t s -55 125 c operating temperature t a -40 85 c average forward input current i f(avg) 10 ma peak forward input current i fpk 20 ma 12 reverse input voltage v r 2 v three state enable voltage v e -0.5 10 v (hcpl-2400 only) supply voltage v cc 0 7 v average output collector current i o -25 25 ma output collector voltage v o -0.5 10 v output voltage v o -0.5 18 v output collector power dissipation p o 40 mw (each channel) total package power dissipation p t 350 mw (each channel) lead solder temperature 260c for 10 sec., 1.6 mm below seating plane (for through hole devices) refow temperature profle see package outline drawings section (option #300) recommended operating conditions parameter symbol minimum maximum units power supply voltage v cc 4.75 5.25 v forward input current (on) i f(on) 4 8 ma forward input voltage (off) v f(off) 0.8 v fan out n 5 ttl loads enable voltage (low) v el 0 0.8 v hcpl-2400 only) enable voltage (high) v eh 2 v cc v hcpl-2400 only) operating temperature t a 0 70 c
8 electrical specifcations 0c t a 70c, 4.75 v v cc 5.25 v, 4 ma i f(on) 8 ma, 0 v v f(off) 0.8 v. all typicals at t a = 25c, v cc = 5 v, i f(on) = 6.0 ma, v f(off) = 0 v, except where noted. see note 11. device parameter symbol hcpl- min. typ.* max. units test conditions fig. note logic low output voltage v ol 0.5 v i ol = 8.0 ma (5 ttl loads) 1 logic high output v oh 2.4 v i oh = -4.0 ma 2 voltage 2.7 i oh = -0.4 ma output leakage current i ohh 100 a v o = 5.25 v, v f = 0.8 v logic high enable current v eh 2400 2.0 v logic low enable voltage v el 2400 0.8 v logic high enable i eh 2400 20 a v e = 2.4 v 100 v e = 5.25 v logic low enable current i el 2400 - 0.28 -0.4 ma v e = 0.4 v logic low supply current i ccl 2400 19 26 ma v cc = 5.25 v, v e = 0 v, i o = open 2430 34 46 v cc = 5.25 v, i o = open logic high supply i cch 2400 17 26 ma v cc = 5.25 v, v e = 0 v, current i o = open 2430 32 42 v cc = 5.25 v, i o = open high impedance state i ccz 2400 22 28 ma v cc = 5.25 v, v e = 5.25 v supply current high impedance state i ozl 2400 20 a v o = 0.4 v v e = 2 v i ozh 20 a v o = 2.4 v i ozh 100 a v o = 5.25 v logic low short circuit i osl 52 ma v o = v cc = 5.25 v, 2 output current i f = 8 ma logic high short circuit i osh -45 ma v cc = 5.25 v, i f = 0 ma, 2 output current v o = gnd input current hysteresis i hys 0.25 ma v cc = 5 v 3 input forward voltage v f 1.1 1.3 1.5 t a = 25c i f = 8 ma 1.0 1.55 4 input reverse breakdown bv r 3.0 5.0 v t a = 25c i r = 10 a 2.0 temperature ?v f -1.44 mv/c i f = 6 ma 4 coefcient of forward voltage input capacitance c in 20 pf f = 1 mhz, v f = 0 v *all typical values at t a = 25c and v cc = 5 v, unless otherwise noted. current voltage ?t a output current
9 switching specifcations 0c t a 70c, 4.75 v v cc 5.25 v, 4 ma i f(on) 8 ma, 0 v v f(off) 0.8 v. all typicals at t a = 25c, v cc = 5 v, i f(on) = 6.0 ma, v f(off) = 0 v, except where noted. see note 11. device parameter symbol hcpl- min. typ.* max. units test conditions figure note propagation delay t phl 55 ns i f(on) = 7 ma 5, 6, 7 1, 4, time to logic low 5, 6 output level 15 33 60 propagation delay t plh 55 ns i f(on) = 7 ma 5, 6, 7 1, 4, time to logic high 5, 6 output level 15 30 60 pulse width |t phl -t plh | 2 15 ns i f(on) = 7 ma 5, 8 6 distortion 5 25 propagation delay t psk 35 ns per notes & text 15, 16 7 skew output rise time t r 20 ns 5 output fall time t f 10 ns 5 output enable time t pzh 2400 15 ns 9, 10 to logic high output enable time t pzl 2400 30 ns 9, 10 to logic low output disable time t phz 2400 20 ns 9, 10 from logic high output disable time t plz 2400 15 ns 9, 10 from logic low logic high common |cm h | 1000 10,000 v/s v cm = 300 v, t a = 25c, 11 9 mode transient i f = 0 ma immunity logic low common |cm l | 1000 10,000 v/s v cm = 300 v, t a = 25c, 11 9 mode transient i f = 4 ma immunity power supply noise psni 0.5 v p-p v cc = 5.0 v, 10 immunity 48 hz = f ac 50 mhz *all typical values at t a = 25c and v cc = 5 v, unless otherwise noted.
10 package characteristics parameter sym. device min. typ.* max. units test conditions fig. note input-output v iso 3750 v rms rh 50%, 3, 13 momentary t = 1 min., withstand voltage** t a = 25c input-output r i-o 10 12 v i-o = 500 vdc 3 resistance input-output c i-o 0.6 pf f = 1 mhz capacitance v i-o = 0 vdc input-input i i-i 2430 0.005 a rh 45% 8 insulation leakage t = 5 s, current v i-i = 500 vdc resistance r i-i 2430 10 11 v i-i = 500 vdc 8 (input-input) capacitance c i-i 2430 0.25 pf f = 1 mhz 8 (input-input) *all typical values are at t a = 25c. **the input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. for the continuous voltage rating refer to the vde 0884 insulation related characteristics table (if applicable), your equipment lev - el safety specifcation or avago application note 1074 entitled optocoupler input-output endurance voltage, publication number 5963-2203e. notes: 1. each channel. 2. duration of output short circuit time not to exceed 10 ms. 3. device considered a two terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. 4. t phl propagation delay is measured from the 50% level on the rising edge of the input current pulse to the 1.5 v level on the falling edge of the output pulse. the t plh propagation delay is measured from the 50% level on the falling edge of the input current pulse to the 1.5 v level on the rising edge of the output pulse. 5. the typical data shown is indicative of what can be expected using the application circuit in figure 13. 6. this specifcation simulates the worst case operating conditions of the hcpl-2400 over the reco m mended operating temperature and v cc range with the suggested application circuit of figure 13. 7. propagation delay skew is discussed later in this data sheet. 8. measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. 9. common mode transient immunity in a logic high level is the maximum tolerable (positive) dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in a logic high state (i.e., v o > 2.0 v). common mode transient immunity in a logic low level is the maximum toler - able (negative) dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in a logic low state (i.e., v o < 0.8 v). 10. power supply noise immunity is the peak to peak amplitude of the ac ripple voltage on the v cc line that the device will withstand and still remain in the desired logic state. for desired logic high state, v oh(min) > 2.0 v, and for desired logic low state, v ol(max) < 0.8 v. 11. use of a 0.1 f bypass capacitor connected between pins 8 and 5 adjacent to the device is required. 12. peak forward input current pulse width < 50 s at 1 khz maximum repetition rate. 13. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 v rms for one second (leakage detec - tion current limit, i i-o 5 a). this test is performed before the 100% produ c tion test shown in the iec/en/din en 60747-5-2 insulation related characteristics table, if applicable.
11 figure 4. typical diode input forward current charac - teristic. figure 6. typical propagation delay vs. ambient temperature. figure 7. typical propagation delay vs. input forward current. figure 8. typical pulse width distortion vs. ambient temperature. figure 5. test circuit for t plh , t phl , t r , and t f . figure 1. typical logic low output voltage vs. logic low output current. figure 2. typical logic high output voltage vs. logic high output current. figure 3. typical output voltage vs. input forward current.
12 figure 9. test circuit for t phz , t pzh , t plz and t pzl . figure 10. typical enable propagation delay vs. ambi - ent temperature. figure 11. test diagram for common mode transient immunity and typical waveforms. figure 12. thermal derating curve, dependence of safety limiting value with case temperature per iec/en/din en 60747-5-2. hcpl-2400 fig 12 output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 200 50 400 125 25 75 100 150 600 800 200 100 300 500 700 p s (mw) i s (ma) 175 0.1 f * v ff + ? f i cc v gnd nc nc cm v + ? 7 5 6 8 2 3 4 1 c = 15 pf a b pulse generator l cc v output v monitoring node o hcpl-2400/11 ? hcpl-2400 fig 11a
13 figure 15. illustration of propagation delay skew C t psk . 50% 1.5 v i f v o 50% i f v o t psk 1.5 v hcpl-2400 fig 15 figure 13. recommended 20 mbd hcpl-2400/30 interface circuit. applications figure 14. alternative hcpl-2400/30 interface circuit. figure 16. parallel data transmission example. figure 17. modulation code selections. figure 18. typical hcpl-2400/30 output schematic. hcpl-2400 fig 16 data t psk inputs clock data outputs clock t psk
propagation delay, pulse-width distortion and propa - gation delay skew propagation delay is a fgure of merit which describes how quickly a logic signal propagates through a sys - tem. the prop aga tion delay from low to high (t plh ) is the amount of time required for an input signal to propa - gate to the output, causing the output to change from low to high. similarly, the propagation delay from high to low (t phl ) is the amount of time required for the input signal to propagate to the output, causing the output to change from high to low (see figure 5). pulse-width distortion (pwd) results when t plh and t phl difer in value. pwd is defned as the diference between t plh and t phl and often determines the maximum data rate capabi l ity of a transmission system. pwd can be ex - pressed in percent by dividing the pwd (in ns) by the minimum pulse width (in ns) being transmitted. typi - cally, pwd on the order of 20-30% of the minimum pulse width is tolerable; the exact fgure depends on the par - ticular application (rs232, rs422, t-1, etc.). propagation delay skew, t psk , is an important param - eter to consider in parallel data appl ica tions where synchroniz a tion of signals on parallel data lines is a con - cern. if the parallel data is being sent through a group of optocouplers, dife r ences in propagation delays will cause the data to arrive at the outputs of the optocou - plers at diferent times. if this diference in propagation delays is large enough, it will determine the maximum rate at which parallel data can be sent through the op - tocouplers. propagation delay skew is defned as the diference be - tween the minimum and max i mum propaga tion delays, either t plh or t phl , for any given group of optocouplers which are operating under the same conditions (i.e., the same drive current, supply voltage, output load, and op - erating te mpe ra ture). as illustrated in figure 15, if the in - puts of a group of optocouplers are switched either on or off at the same time, t psk is the diference between the shortest propagation delay, either t plh or t phl , and the longest pro-pagation delay, either t plh or t phl . as mentioned earlier, t psk can determine the maximum parallel data transmission rate. figure 16 is the timing diagram of a typical parallel data appl ica tion with both the clock and the data lines being sent through opto - couplers. the fgure shows data and clock signals at the inputs and outputs of the optocouplers. to obtain the maximum data transmission rate, both edges of the clock signals are being used to clock the data; if only one edge were used, the clock signal would need to be twice as fast. propagation delay skew repr e sents the uncertainty of where an edge might be after being sent through an opt o coupler. figure 16 shows that there will be uncer - tainty in both the data and the clock lines. it is impor - tant that these two areas of uncertainty not overlap, otherwise the clock signal might arrive before all of the data outputs have settled, or some of the data outputs may start to change before the clock signal has arrived. from these consi d erations, the absolute minimum pulse width that can be sent through optocouplers in a par - allel application is twice t phz . a cautious design should use a slightly longer pulse width to ensure that any addi - tional uncertainty in the rest of the circuit does not cause a problem. the hcpl-2400/30 optocouplers ofer the advantages of guara n teed specifcations for propag a tion delays, pulse- width distortion, and propagation delay skew over the reco m mended temperature, input current, and power supply ranges. application circuit a recommended led drive circuit is shown in figure 13. this circuit utilizes several techniques to minimize the total pulse-width distortion at the output of the opto - coupler. by using two inverting ttl gates connected in series, the inherent pulse-width distortion of each gate cancels the distortion of the other gate. for best results, the two series-connected gates should be from the same package. the circuit in figure 13 also uses techniques known as pr e bias and peaking to enhance the performance of the optocoupler led. prebias is a small forward voltage ap - plied to the led when the led is of. this small prebias voltage partially charges the junction capacitance of the led, allowing the led to turn on more quickly. the speed of the led is further increased by applying momentary current peaks to the led during the turn-on and turn-of transitions of the drive current. these peak currents help to charge and discharge the capacitances of the led more quickly, shorte n ing the time required for the led to turn on and of.
switching performance of the hcpl-2400/30 optocou - plers is not sensitive to the ttl logic family used in the recommended drive circuit. the typical and worst-case switching parameters given in the data sheet can be met using common 74ls ttl inver t ing gates or bufers. use of faster ttl families will slightly reduce the overall propagation delays from the input of the drive circuit to the output of the optocoupler, but will not necessarily result in lower pulse-width distortion or propagation de - lay skew. this reduction in overall propagation delay is due to shorter delays in the drive circuit, not to changes in the propagation delays of the optocoupler; optocou - pler pro p agation delays are not afected by the speed of the logic used in the drive circuit. for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 2007 avago technologies limited. all rights reserved. obsoletes av01-0563en av02-0962en - january 4, 2008

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